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PPCRec: Code cleanup
This commit is contained in:
Exzap
parent
2fe2799d96
commit
05e3cfe5c9
10 changed files with 188 additions and 523 deletions
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@ -3,7 +3,7 @@
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#include "IMLRegisterAllocatorRanges.h"
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#include "util/helpers/MemoryPool.h"
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uint32 PPCRecRA_getNextIterationIndex();
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uint32 IMLRA_GetNextIterationIndex();
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IMLRegID raLivenessRange::GetVirtualRegister() const
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{
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@ -20,12 +20,12 @@ IMLName raLivenessRange::GetName() const
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return name;
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}
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void raLivenessRange::SetPhysicalRegister(sint32 physicalRegister)
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void raLivenessRange::SetPhysicalRegister(IMLPhysReg physicalRegister)
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{
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this->physicalRegister = physicalRegister;
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}
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void raLivenessRange::SetPhysicalRegisterForCluster(sint32 physicalRegister)
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void raLivenessRange::SetPhysicalRegisterForCluster(IMLPhysReg physicalRegister)
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{
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auto clusterRanges = GetAllSubrangesInCluster();
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for(auto& range : clusterRanges)
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@ -34,7 +34,7 @@ void raLivenessRange::SetPhysicalRegisterForCluster(sint32 physicalRegister)
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boost::container::small_vector<raLivenessRange*, 128> raLivenessRange::GetAllSubrangesInCluster()
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{
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uint32 iterationIndex = PPCRecRA_getNextIterationIndex();
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uint32 iterationIndex = IMLRA_GetNextIterationIndex();
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boost::container::small_vector<raLivenessRange*, 128> subranges;
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subranges.push_back(this);
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this->lastIterationIndex = iterationIndex;
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@ -87,7 +87,7 @@ void raLivenessRange::GetAllowedRegistersExRecursive(raLivenessRange* range, uin
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bool raLivenessRange::GetAllowedRegistersEx(IMLPhysRegisterSet& allowedRegisters)
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{
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uint32 iterationIndex = PPCRecRA_getNextIterationIndex();
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uint32 iterationIndex = IMLRA_GetNextIterationIndex();
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allowedRegisters.SetAllAvailable();
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GetAllowedRegistersExRecursive(this, iterationIndex, allowedRegisters);
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return !allowedRegisters.HasAllAvailable();
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@ -96,7 +96,7 @@ bool raLivenessRange::GetAllowedRegistersEx(IMLPhysRegisterSet& allowedRegisters
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IMLPhysRegisterSet raLivenessRange::GetAllowedRegisters(IMLPhysRegisterSet regPool)
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{
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IMLPhysRegisterSet fixedRegRequirements = regPool;
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if(interval2.ExtendsPreviousSegment() || interval2.ExtendsIntoNextSegment())
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if(interval.ExtendsPreviousSegment() || interval.ExtendsIntoNextSegment())
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{
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auto clusterRanges = GetAllSubrangesInCluster();
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for(auto& subrange : clusterRanges)
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@ -203,7 +203,7 @@ void PPCRecRARange_removeLink_allSegmentRanges(raLivenessRange** root, raLivenes
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MemoryPoolPermanentObjects<raLivenessRange> memPool_livenessSubrange(4096);
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// startPosition and endPosition are inclusive
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raLivenessRange* PPCRecRA_createSubrange2(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, IMLRegID virtualRegister, IMLName name, raInstructionEdge startPosition, raInstructionEdge endPosition)
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raLivenessRange* IMLRA_CreateRange(ppcImlGenContext_t* ppcImlGenContext, IMLSegment* imlSegment, IMLRegID virtualRegister, IMLName name, raInstructionEdge startPosition, raInstructionEdge endPosition)
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{
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raLivenessRange* range = memPool_livenessSubrange.acquireObj();
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range->previousRanges.clear();
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@ -212,8 +212,8 @@ raLivenessRange* PPCRecRA_createSubrange2(ppcImlGenContext_t* ppcImlGenContext,
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range->imlSegment = imlSegment;
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cemu_assert_debug(startPosition <= endPosition);
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range->interval2.start = startPosition;
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range->interval2.end = endPosition;
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range->interval.start = startPosition;
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range->interval.end = endPosition;
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// register mapping
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range->virtualRegister = virtualRegister;
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@ -233,42 +233,42 @@ raLivenessRange* PPCRecRA_createSubrange2(ppcImlGenContext_t* ppcImlGenContext,
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return range;
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}
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void _unlinkSubrange(raLivenessRange* subrange)
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void _unlinkSubrange(raLivenessRange* range)
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{
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IMLSegment* imlSegment = subrange->imlSegment;
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PPCRecRARange_removeLink_perVirtualGPR(imlSegment->raInfo.linkedList_perVirtualRegister, subrange);
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PPCRecRARange_removeLink_allSegmentRanges(&imlSegment->raInfo.linkedList_allSubranges, subrange);
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IMLSegment* imlSegment = range->imlSegment;
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PPCRecRARange_removeLink_perVirtualGPR(imlSegment->raInfo.linkedList_perVirtualRegister, range);
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PPCRecRARange_removeLink_allSegmentRanges(&imlSegment->raInfo.linkedList_allSubranges, range);
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// unlink reverse references
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if(subrange->subrangeBranchTaken)
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subrange->subrangeBranchTaken->previousRanges.erase(std::find(subrange->subrangeBranchTaken->previousRanges.begin(), subrange->subrangeBranchTaken->previousRanges.end(), subrange));
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if(subrange->subrangeBranchNotTaken)
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subrange->subrangeBranchNotTaken->previousRanges.erase(std::find(subrange->subrangeBranchNotTaken->previousRanges.begin(), subrange->subrangeBranchNotTaken->previousRanges.end(), subrange));
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subrange->subrangeBranchTaken = (raLivenessRange*)(uintptr_t)-1;
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subrange->subrangeBranchNotTaken = (raLivenessRange*)(uintptr_t)-1;
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if(range->subrangeBranchTaken)
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range->subrangeBranchTaken->previousRanges.erase(std::find(range->subrangeBranchTaken->previousRanges.begin(), range->subrangeBranchTaken->previousRanges.end(), range));
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if(range->subrangeBranchNotTaken)
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range->subrangeBranchNotTaken->previousRanges.erase(std::find(range->subrangeBranchNotTaken->previousRanges.begin(), range->subrangeBranchNotTaken->previousRanges.end(), range));
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range->subrangeBranchTaken = (raLivenessRange*)(uintptr_t)-1;
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range->subrangeBranchNotTaken = (raLivenessRange*)(uintptr_t)-1;
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// remove forward references
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for(auto& prev : subrange->previousRanges)
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for(auto& prev : range->previousRanges)
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{
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if(prev->subrangeBranchTaken == subrange)
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if(prev->subrangeBranchTaken == range)
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prev->subrangeBranchTaken = nullptr;
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if(prev->subrangeBranchNotTaken == subrange)
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if(prev->subrangeBranchNotTaken == range)
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prev->subrangeBranchNotTaken = nullptr;
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}
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subrange->previousRanges.clear();
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range->previousRanges.clear();
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}
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void PPCRecRA_deleteSubrange(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* subrange)
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void IMLRA_DeleteRange(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* range)
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{
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_unlinkSubrange(subrange);
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subrange->list_accessLocations.clear();
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subrange->list_fixedRegRequirements.clear();
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memPool_livenessSubrange.releaseObj(subrange);
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_unlinkSubrange(range);
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range->list_accessLocations.clear();
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range->list_fixedRegRequirements.clear();
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memPool_livenessSubrange.releaseObj(range);
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}
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void PPCRecRA_deleteSubrangeCluster(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* subrange)
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void IMLRA_DeleteRangeCluster(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* range)
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{
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auto clusterRanges = subrange->GetAllSubrangesInCluster();
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auto clusterRanges = range->GetAllSubrangesInCluster();
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for (auto& subrange : clusterRanges)
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PPCRecRA_deleteSubrange(ppcImlGenContext, subrange);
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IMLRA_DeleteRange(ppcImlGenContext, subrange);
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}
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void IMLRA_DeleteAllRanges(ppcImlGenContext_t* ppcImlGenContext)
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@ -277,13 +277,13 @@ void IMLRA_DeleteAllRanges(ppcImlGenContext_t* ppcImlGenContext)
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{
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raLivenessRange* cur;
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while(cur = seg->raInfo.linkedList_allSubranges)
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PPCRecRA_deleteSubrange(ppcImlGenContext, cur);
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IMLRA_DeleteRange(ppcImlGenContext, cur);
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seg->raInfo.linkedList_allSubranges = nullptr;
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seg->raInfo.linkedList_perVirtualRegister.clear();
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}
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}
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void PPCRecRA_mergeSubranges(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* subrange, raLivenessRange* absorbedSubrange)
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void IMLRA_MergeSubranges(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* subrange, raLivenessRange* absorbedSubrange)
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{
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#ifdef CEMU_DEBUG_ASSERT
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PPCRecRA_debugValidateSubrange(subrange);
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@ -322,17 +322,17 @@ void PPCRecRA_mergeSubranges(ppcImlGenContext_t* ppcImlGenContext, raLivenessRan
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subrange->list_fixedRegRequirements.push_back(fixedReg);
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absorbedSubrange->list_fixedRegRequirements.clear();
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subrange->interval2.end = absorbedSubrange->interval2.end;
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subrange->interval.end = absorbedSubrange->interval.end;
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PPCRecRA_debugValidateSubrange(subrange);
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PPCRecRA_deleteSubrange(ppcImlGenContext, absorbedSubrange);
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IMLRA_DeleteRange(ppcImlGenContext, absorbedSubrange);
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}
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// remove all inter-segment connections from the range cluster and split it into local ranges (also removes empty ranges)
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void PPCRecRA_explodeRange(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* originRange)
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// remove all inter-segment connections from the range cluster and split it into local ranges. Ranges are trimmed and if they have no access location they will be removed
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void IMLRA_ExplodeRangeCluster(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange* originRange)
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{
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cemu_assert_debug(originRange->interval2.ExtendsPreviousSegment() || originRange->interval2.ExtendsIntoNextSegment()); // only call this on ranges that span multiple segments
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cemu_assert_debug(originRange->interval.ExtendsPreviousSegment() || originRange->interval.ExtendsIntoNextSegment()); // only call this on ranges that span multiple segments
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auto clusterRanges = originRange->GetAllSubrangesInCluster();
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for (auto& subrange : clusterRanges)
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{
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@ -340,7 +340,7 @@ void PPCRecRA_explodeRange(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange
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continue;
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raInterval interval;
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interval.SetInterval(subrange->list_accessLocations.front().pos, subrange->list_accessLocations.back().pos);
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raLivenessRange* newSubrange = PPCRecRA_createSubrange2(ppcImlGenContext, subrange->imlSegment, subrange->GetVirtualRegister(), subrange->GetName(), interval.start, interval.end);
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raLivenessRange* newSubrange = IMLRA_CreateRange(ppcImlGenContext, subrange->imlSegment, subrange->GetVirtualRegister(), subrange->GetName(), interval.start, interval.end);
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// copy locations and fixed reg indices
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newSubrange->list_accessLocations = subrange->list_accessLocations;
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newSubrange->list_fixedRegRequirements = subrange->list_fixedRegRequirements;
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@ -351,17 +351,17 @@ void PPCRecRA_explodeRange(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange
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// validate
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if(!newSubrange->list_accessLocations.empty())
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{
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cemu_assert_debug(newSubrange->list_accessLocations.front().pos >= newSubrange->interval2.start);
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cemu_assert_debug(newSubrange->list_accessLocations.back().pos <= newSubrange->interval2.end);
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cemu_assert_debug(newSubrange->list_accessLocations.front().pos >= newSubrange->interval.start);
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cemu_assert_debug(newSubrange->list_accessLocations.back().pos <= newSubrange->interval.end);
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}
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if(!newSubrange->list_fixedRegRequirements.empty())
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{
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cemu_assert_debug(newSubrange->list_fixedRegRequirements.front().pos >= newSubrange->interval2.start); // fixed register requirements outside of the actual access range probably means there is a mistake in GetInstructionFixedRegisters()
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cemu_assert_debug(newSubrange->list_fixedRegRequirements.back().pos <= newSubrange->interval2.end);
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cemu_assert_debug(newSubrange->list_fixedRegRequirements.front().pos >= newSubrange->interval.start); // fixed register requirements outside of the actual access range probably means there is a mistake in GetInstructionFixedRegisters()
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cemu_assert_debug(newSubrange->list_fixedRegRequirements.back().pos <= newSubrange->interval.end);
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}
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}
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// remove subranges
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PPCRecRA_deleteSubrangeCluster(ppcImlGenContext, originRange);
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// delete the original range cluster
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IMLRA_DeleteRangeCluster(ppcImlGenContext, originRange);
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}
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#ifdef CEMU_DEBUG_ASSERT
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@ -408,19 +408,19 @@ void IMLRA_TrimRangeToUse(raLivenessRange* range)
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if(range->list_accessLocations.empty())
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{
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// special case where we trim ranges extending from other segments to a single instruction edge
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cemu_assert_debug(!range->interval2.start.IsInstructionIndex() || !range->interval2.end.IsInstructionIndex());
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if(range->interval2.start.IsInstructionIndex())
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range->interval2.start = range->interval2.end;
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if(range->interval2.end.IsInstructionIndex())
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range->interval2.end = range->interval2.start;
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cemu_assert_debug(!range->interval.start.IsInstructionIndex() || !range->interval.end.IsInstructionIndex());
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if(range->interval.start.IsInstructionIndex())
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range->interval.start = range->interval.end;
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if(range->interval.end.IsInstructionIndex())
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range->interval.end = range->interval.start;
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return;
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}
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// trim start and end
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raInterval prevInterval = range->interval2;
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if(range->interval2.start.IsInstructionIndex())
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range->interval2.start = range->list_accessLocations.front().pos;
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if(range->interval2.end.IsInstructionIndex())
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range->interval2.end = range->list_accessLocations.back().pos;
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raInterval prevInterval = range->interval;
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if(range->interval.start.IsInstructionIndex())
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range->interval.start = range->list_accessLocations.front().pos;
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if(range->interval.end.IsInstructionIndex())
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range->interval.end = range->list_accessLocations.back().pos;
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// extra checks
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#ifdef CEMU_DEBUG_ASSERT
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cemu_assert_debug(range->interval2.start <= range->interval2.end);
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@ -438,22 +438,20 @@ void IMLRA_TrimRangeToUse(raLivenessRange* range)
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// tail -> a new subrange that ranges from splitIndex (inclusive) to the end of the original subrange
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// if head has a physical register assigned it will not carry over to tail
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// The return value is the tail range
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// If trimToHole is true, the end of the head subrange and the start of the tail subrange will be shrunk to fit the read/write locations within them
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// the range after the split point does not inherit the physical register
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// if trimToHole is true and any of the halfes is empty, it will be deleted
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raLivenessRange* PPCRecRA_splitLocalSubrange2(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange*& subrange, raInstructionEdge splitPosition, bool trimToHole)
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// If trimToUsage is true, the end of the head subrange and the start of the tail subrange will be shrunk to fit the read/write locations within. If there are no locations then the range will be deleted
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raLivenessRange* IMLRA_SplitRange(ppcImlGenContext_t* ppcImlGenContext, raLivenessRange*& subrange, raInstructionEdge splitPosition, bool trimToUsage)
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{
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cemu_assert_debug(splitPosition.IsInstructionIndex());
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cemu_assert_debug(!subrange->interval2.IsNextSegmentOnly() && !subrange->interval2.IsPreviousSegmentOnly());
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cemu_assert_debug(subrange->interval2.ContainsEdge(splitPosition));
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cemu_assert_debug(!subrange->interval.IsNextSegmentOnly() && !subrange->interval.IsPreviousSegmentOnly());
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cemu_assert_debug(subrange->interval.ContainsEdge(splitPosition));
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// determine new intervals
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raInterval headInterval, tailInterval;
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headInterval.SetInterval(subrange->interval2.start, splitPosition-1);
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tailInterval.SetInterval(splitPosition, subrange->interval2.end);
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headInterval.SetInterval(subrange->interval.start, splitPosition-1);
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tailInterval.SetInterval(splitPosition, subrange->interval.end);
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cemu_assert_debug(headInterval.start <= headInterval.end);
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cemu_assert_debug(tailInterval.start <= tailInterval.end);
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// create tail
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raLivenessRange* tailSubrange = PPCRecRA_createSubrange2(ppcImlGenContext, subrange->imlSegment, subrange->GetVirtualRegister(), subrange->GetName(), tailInterval.start, tailInterval.end);
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raLivenessRange* tailSubrange = IMLRA_CreateRange(ppcImlGenContext, subrange->imlSegment, subrange->GetVirtualRegister(), subrange->GetName(), tailInterval.start, tailInterval.end);
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tailSubrange->SetPhysicalRegister(subrange->GetPhysicalRegister());
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// carry over branch targets and update reverse references
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tailSubrange->subrangeBranchTaken = subrange->subrangeBranchTaken;
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@ -505,23 +503,23 @@ raLivenessRange* PPCRecRA_splitLocalSubrange2(ppcImlGenContext_t* ppcImlGenConte
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}
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}
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// adjust intervals
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subrange->interval2 = headInterval;
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tailSubrange->interval2 = tailInterval;
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subrange->interval = headInterval;
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tailSubrange->interval = tailInterval;
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// trim to hole
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if(trimToHole)
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if(trimToUsage)
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{
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if(subrange->list_accessLocations.empty() && (subrange->interval2.start.IsInstructionIndex() && subrange->interval2.end.IsInstructionIndex()))
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if(subrange->list_accessLocations.empty() && (subrange->interval.start.IsInstructionIndex() && subrange->interval.end.IsInstructionIndex()))
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{
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PPCRecRA_deleteSubrange(ppcImlGenContext, subrange);
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IMLRA_DeleteRange(ppcImlGenContext, subrange);
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subrange = nullptr;
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}
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else
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{
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IMLRA_TrimRangeToUse(subrange);
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}
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if(tailSubrange->list_accessLocations.empty() && (tailSubrange->interval2.start.IsInstructionIndex() && tailSubrange->interval2.end.IsInstructionIndex()))
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if(tailSubrange->list_accessLocations.empty() && (tailSubrange->interval.start.IsInstructionIndex() && tailSubrange->interval.end.IsInstructionIndex()))
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{
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PPCRecRA_deleteSubrange(ppcImlGenContext, tailSubrange);
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IMLRA_DeleteRange(ppcImlGenContext, tailSubrange);
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tailSubrange = nullptr;
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}
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else
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@ -530,11 +528,11 @@ raLivenessRange* PPCRecRA_splitLocalSubrange2(ppcImlGenContext_t* ppcImlGenConte
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}
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}
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// validation
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cemu_assert_debug(!subrange || subrange->interval2.start <= subrange->interval2.end);
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cemu_assert_debug(!tailSubrange || tailSubrange->interval2.start <= tailSubrange->interval2.end);
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cemu_assert_debug(!tailSubrange || tailSubrange->interval2.start >= splitPosition);
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if (!trimToHole)
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cemu_assert_debug(!tailSubrange || tailSubrange->interval2.start == splitPosition);
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cemu_assert_debug(!subrange || subrange->interval.start <= subrange->interval.end);
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cemu_assert_debug(!tailSubrange || tailSubrange->interval.start <= tailSubrange->interval.end);
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cemu_assert_debug(!tailSubrange || tailSubrange->interval.start >= splitPosition);
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if (!trimToUsage)
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cemu_assert_debug(!tailSubrange || tailSubrange->interval.start == splitPosition);
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if(subrange)
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PPCRecRA_debugValidateSubrange(subrange);
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@ -560,8 +558,8 @@ sint32 IMLRA_CalculateAdditionalCostOfRangeExplode(raLivenessRange* subrange)
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if (subrange->list_accessLocations.empty())
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continue; // this range would be deleted and thus has no cost
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sint32 segmentLoadStoreCost = IMLRA_GetSegmentReadWriteCost(subrange->imlSegment);
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bool hasAdditionalLoad = subrange->interval2.ExtendsPreviousSegment();
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bool hasAdditionalStore = subrange->interval2.ExtendsIntoNextSegment();
|
||||
bool hasAdditionalLoad = subrange->interval.ExtendsPreviousSegment();
|
||||
bool hasAdditionalStore = subrange->interval.ExtendsIntoNextSegment();
|
||||
if(hasAdditionalLoad && subrange->list_accessLocations.front().IsWrite()) // if written before read then a load isn't necessary
|
||||
{
|
||||
cemu_assert_debug(!subrange->list_accessLocations.front().IsRead());
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue